This invention relates generally to semiconductor device fabrication, and more particularly to photoresist shrinkage as may occur in photolithographic processing during such fabrication.
Since the invention of the integrated circuit (IC), semiconductor chip features have become exponentially smaller and the number of transistors per device exponentially larger. Advanced IC""s with hundreds of millions of transistors at feature sizes of 0.25 micron, 0.18 micron, and less are becoming routine. Improvement in overlay tolerances in photolithography, and the introduction of new light sources with progressively shorter wavelengths, have allowed optical steppers to significantly reduce the resolution limit for semiconductor fabrication far beyond one micron. To continue to make chip features smaller, and increase the transistor density of semiconductor devices, IC""s have begun to be manufactured that have features smaller than the lithographic wavelength.
Sub-wavelength lithography, however, places large burdens on lithographic processes. Resolution of anything smaller than a wavelength is generally quite difficult. Pattern fidelity can deteriorate dramatically in sub-wavelength lithography. The resulting semiconductor features may deviate significantly in size and shape from the ideal pattern drawn by the circuit designer. Critical dimensions (CD""s), which are the geometries and spacings used to monitor the pattern size and ensure that it is within the customer""s specification, are especially important to have size maintenance during processing. CD bias refers to when the designed and actual values do not match. Ideally, bias approaches zero, but in actuality can measurably affect the resulting semiconductor device""s performance and operation.
CD bias can result when the photoresist used during photolithographic processing shrinks, causing the CD values reflected in the photoresist to likewise shrink. A simple example is shown in FIGS. 1A and 1B. In FIG. 1A, the photoresist layer 104 on the semiconductor substrate 102 has a desired width 106, corresponding to a CD. After some photolithographic processing operations, however, the width of the layer 104 may shrink, as shown in FIG. 1B. The photoresist layer 104 in FIG. 1B has a width 108 that is reduced as compared to the desired width 106. Such CD bias is undesirable, and can cause performance and other errors in the resulting semiconductor device being fabricated.
Photoresist shrinkage is especially present in 193 nanometer (nm) lithography, which is also referred to as ArF lithography due to the type of laser used, an Argon Fluoride (ArF) laser. This is as compared to 248 nm lithography, which is referred to as KrF lithography due to its use of a Krypton Fluoride (KrF) laser. ArF laser lithography thus has a shorter wavelengthxe2x80x94193 nmxe2x80x94as compared to KrF laser lithography, which has a 248 nm wavelength. It has been found that 193 nm photoresist lines shrink when exposed to an electron beam (e-beam) during CD measurements. This is significant, because CD measurements must periodically be taken to verify the CD""s of the semiconductor device being fabricated. Such e-beam exposure usually occurs when using CD scanning electron microscopes (CD-SEM""s) for CD measurement. Such CD measurement is referred to as CD-SEM measurement.
CD control is also a major challenge in sub-130 nm lithography technology. Advanced process control (APC) CD-bias feed-forward systems have been widely deployed for after-etch inspection (AEI) and after-development inspection (ADI) of CD""s, as an automated manner by which CD""s can be monitored and verified. However, ArF photoresist CD shrinkage caused by CD-SEM measurements distorts the CD bias, potentially leading to errors in the feed-forward system. That is, because CD-SEM measurements cause photoresist CD""s to shrink, the APC CD-bias feed-forward systems can actually introduce errors into the semiconductor processing, by reducing the CD""s that they are supposed to monitor and correct.
Unfortunately, whereas ArF resist shrinkage is a known phenomenon, its origins are not well understood. The magnitude of the shrinkage is material dependent. Acrylate-type resists shrink more than cycloolefin/maleic anyhride (COMA)-type resists. This may be due to polymer chain cleavage, which is observed on standard e-beam polymethyl methacrylate (PMMA) resists, or may be caused by polymer cross-linking, among other potential causes. For example, repeated measurements in an SEM may result in cross-linking, annealing, or hardening of the photoresist, causing it to shrink in volume. Different accelerating voltages or measurement doses may cause different levels of cross-linking on the resist surface, causing different shrinkage effects. At higher accelerating voltages or measurement frequencies, a greater volume of the photoresist may cross-link, causing greater resist shrinkage.
Therefore, as e-beam dosage increase with repeated CD-SEM measurements, more polymers within the photoresist undergo cross-linking, until all available polymers have done so. Shrinkage beings at the depth of e-beam penetration. Two mechanisms are believed to maintain progression of the shrinking. First, as repeated measurements continue, the increase e-beam dose induces more polymer cross-links within the e-beam penetration area, until all available polymers are depleted. Second, as the resist shrinks, the e-beam reaches a little deeper into the resist, inducing more resist shrinkage, until the cross-polymerized denser resist prevents further penetration.
Because APC CD-bias feed-forward systems can be a crucial component in ensuring proper CD bias, one approach to reducing photoresist shrinkage is to decrease the CD-SEM e-beam dosage when measuring the CD""s. For example, a low voltage, such as 300 volts instead of 600 volts, may be used. Alternatively, a low beam current, low magnification, low image acquisition time, and/or off-site automatic SEM focusing can be used as way(s) to lower e-beam dosage. However, lowering the e-beam dosage typically only reduces photoresist shrinkage, and cannot guarantee elimination of resist shrinkage. Furthermore, it may also reduce image resolution, which is detrimental when measuring contact holes and other specific types of CD""s.
Another existing approach to reducing photoresist shrinkage is to use e-beam curing prior to CD-SEM measurement. E-beam curing prior to CD-SEM measurement can eliminate shrinkage, but has some significant disadvantages. E-beam curing is the use of an e-beam to cure the photoresist, so that it subsequently will not shrink when CD-SEM measurements are taken. The cross-linking of the resist caused by e-beam curing, which prevents subsequent resist shrinkage, however, also affects the profile of the photoresist, especially in corner areas. This is disadvantageous because it means that the photoresist itself changes shape, which is problematic for later semiconductor fabrication processing that contemplates usage of a particular shape or profile of the resist. A simple example of this is shown in FIG. 1C. The resist layer 104 has its corners 110 and 112 rounded as compared to the layer 104 of FIG. 1, which is undesirable. E-beam curing may also potentially cause electron charge damage to the semiconductor device being fabricated.
Therefore, there is a need for reducing photoresist shrinkage that avoids these problems. Specifically, there is a need for reducing resist shrinkage that substantially eliminates shrinkage, and does not just reduce the shrinkage as lowering the e-beam dosage during CD-SEM measurement does. There is a need for reducing resist shrinkage that does not incur the side effects of e-beam curing, particularly the undesirable resist profile modification of e-beam curing. For these and other reasons, there is a need for the present invention.
The invention relates to using plasma curing to prevent photoresist shrinkage. A semiconductor wafer having one or more photoresist layers is plasma treated, such as plasma curing, plasma etching, and/or high-density plasma etching the wafer. After plasma treating, one or more critical dimensions on the photoresist layers is measured using an electron beam, such as by using a scanning electron microscope (SEM). The plasma treating of the wafer prior to measuring the critical dimensions using the electron beam decreases shrinkage of the photoresist layer when using the electron beam.
Embodiments of the invention provide for advantages over the prior art. Plasma treatment substantially eliminates photoresist shrinkage, as opposed to mere reduction as lowering the e-beam dosage during critical dimension SEM measurement does. Plasma treatment also avoids the side effects that results from electron beam curing, especially the undesirable resist profile modification that results from electron beam curing. Still other advantages, aspects, and embodiments of the invention will become apparent by reading the detailed description that follows, and by referring to the accompanying drawings.